Instruction Formats and it's types

Instruction Format defines the layout of bits in an instruction, specifying the structure of an operation. It includes details like the opcode, operands, and addressing mode. The format determines how the CPU interprets and executes instructions.

---

Main Components of an Instruction Format:

Field	Description
Opcode	Specifies the operation to be performed (e.g., ADD, MOV).
Operand(s)	Specifies the data or the addresses of data for the operation.
Addressing Mode	Indicates how to interpret the operands (e.g., direct, indirect).
Mode Bits	(Optional) Specifies special operation modes.

---

Types of Instruction Formats:

---

1️⃣ Zero-Operand (0-Address) Instruction Format

• Typically used in Stack-based Architectures.
• All operations are performed on the stack.
• No operand is specified; the CPU automatically uses the top elements of the stack.

Example:

PUSH 10     ; Push 10 onto the stack
PUSH 20     ; Push 20 onto the stack
ADD         ; Pop two values, add them, and push the result back

Opcode
ADD

---

2️⃣ One-Operand (1-Address) Instruction Format

• Contains only one operand; the second operand is implied (usually the Accumulator (AC)).
• Efficient for simple operations and memory access.

Example:

LOAD 1000   ; Load the value from memory address 1000 into AC
ADD 1001    ; Add the value from address 1001 to AC
STORE 1002  ; Store the result back to address 1002

Opcode	Address
ADD	1001

---

3️⃣ Two-Operand (2-Address) Instruction Format

• Contains two operands: a source and a destination.
• The result is stored in the destination operand.

Example:

MOV AX, BX  ; Move the contents of BX to AX
ADD AX, CX  ; Add the contents of CX to AX

Opcode	Source	Destination
MOV	BX	AX

---

4️⃣ Three-Operand (3-Address) Instruction Format

• Contains three operands: two sources and one destination.
• Used in RISC (Reduced Instruction Set Computer) architectures for more complex operations.

Example:

ADD R1, R2, R3   ; R1 = R2 + R3
SUB R4, R5, R6   ; R4 = R5 - R6

Opcode	Operand 1	Operand 2	Destination
ADD	R2	R3	R1

---

5️⃣ Variable-Length Instruction Format

• Instructions can have different lengths.
• Common in CISC (Complex Instruction Set Computer) architectures.
• More flexible but more complex to decode.

Example:

MOV AX, 1234      ; 16-bit instruction
MOV BX, [5678]    ; 32-bit instruction

Opcode	Operands (Variable Size)
MOV	AX, 1234

---

Comparison of Instruction Formats:

Format Type	Operands	Usage	Architecture
0-Address	None	Stack operations	Stack Machines
1-Address	One	Simple memory operations	Accumulator-based
2-Address	Two	Data transfer and arithmetic	General Purpose
3-Address	Three	Complex arithmetic and logic	RISC Processors
Variable-Length	Varies	Flexible operations	CISC Processors